Advanced Mixed-Signal Integrated Circuit (AMSIC) Group

Preface

Nice to see you here. This group is incubated and established in Jan. 2024 supported by Shenjian Zhang (Founder), Dian Sheng (Co-founder), and Prof. Chun Zhao (XJTLU). The initial target aims to innovate state-of-the-art analog and mixed-signal integrated circuits and systems, expecially corresponding with CMOS-based and synaptic-device-based artificial intelligence intergrated circuit (AIIC) designs and applications. Up to now, our group conducts several projects in the fields of AD/DA converter, DC-DC converter, and transceiver.

Current Research

1. A 10-bit Coarse-Fine SAR ADC with Offset Compensation
2. Low Latency Sigma-Delta ADC
3. Digital Front-End for Audio Power Amplifier
4. A Coarse-Fine Digital-to-Analog Converter (DAC) Design with Differential Current-Steering and Arithmetic Charge-Distribution
5. VCO……

Completed Projects

1. A High-Efficient DC-DC Buck Converter based on Valley Current Mode with ACOT Scheme
2. A Compact Multi-Bit Multi-Order FIR DAC Design for Internet of Things
3. Synaptic Thin-Film Transistor Model based on Behavioral Simulation

People

• Shenjian Zhang
• Dian Sheng
• Rui Li
• Junyan Li
• Jiaxiu Xu
• Zetong Li
• Chun Zhao
• Yuxin Guan

News

– Aug. 30, 2024: Successful completion of AMSIC & XJTLU SURF 2024!

– Jun. 13, 2024: Launch of AMSIC & XJTLU Summer Undergraduate Research Fellowship (SURF) 2024!
Team member: Shenjian Zhang, Jiaxiu Xu, Yu Sun, Wenjing Qu, Xinyi Chen, Bowen Duan, Zetong Li

Contact Us

Jupiter Semi
G1-602,
Artificial Intelligence Industry Park,
88 Jinjihu Road,
Suzhou Industrial Park (SIP), Suzhou,
Jiangsu Province, P. R. China
215123

Embedded AI Hardware Universities-Enterprises Joint Key Laboratory
IR-724,
Xi’an Jiaotong-Liverpool University,
111 Ren’ai Road,
Suzhou Industrial Park (SIP), Suzhou,
Jiangsu Province, P. R. China
215123